1. Field of the Invention
The present invention relates to a D.C. offset cancellation circuit and, particularly, to an offset cancellation circuit for removing a D.C. component contained in an output of an analog-to-digital converter.
2. Description of the Prior Art
An analog-to-digital (A/D) converter widely used in a digital signal processing device or a digital communication system has a problem that an analog modulator which is a key component of the converter produces D.C. drift inherently. Due to this D.C. drift, an output of the analog modulator may contain a D.C. offset (referred to as "offset" hereinafter) component. Such offset component may cause an overflow problem in arithmetic operation of integration and/or addition in, for example, a digital audio signal processing device to occur, which may be audible as click or noise. Therefore, such offset component is to be removed.
It is known that a low frequency component of such offset component can be removed by inserting a digital filter in a stage subsequent to the A/D converter and it is further known that a digital filter of such as non-recursive, finite impulse response (FIR) type has a sharp frequency cut-off characteristics. Nevertheless, such scheme has not been used practically since the number of filtering stages required in such signal processing device and hence the number of registers thereof required for holding data have to be increased, making size of such device very large.
Instead thereof, a calibration system has been used widely for removing offset component. This system is constituted, as disclosed in U.S. Pat. No. 4,943,807, such that an output digital value of an A/D converter, when a ground potential is input thereto prior to a start of A/D conversing operation, is stored in a memory and an output of the same A/D converter for an input analog signal supplied after start of the A/D conversing operation is corrected with the digital value read from the memory.
That is, the offset cancellation circuit of the calibration system includes, as basic components, an analog-to-digital converter, switch means having a movable contact terminal connected to an input terminal of the analog-to-digital converter and two fixed contact terminals, one being connected to an input analog signal source and the other being connected to ground potential, and responsive to a control signal for supplying ground potential to the input terminal of the analog-to-digital converter in an offset value detection mode and the input analog signal thereto in an ordinary mode, a random access memory (RAM) connected to an output terminal of the analog-to-digital converter and responsive to the control signal for storing the offset value and subtracter means for subtracting the offset value read from the random access memory from an output digital signal of the analog-to-digital converter in the ordinary mode. Since the digitized offset value indicates an offset component inherent to the analog-to-digital converter, the output digital signal at the output of the subtracter does not contain the offset component. An analog-to-digital converter including an offset cancellation circuit of this calibration system is disclosed in the user manual, "AK5326/27 16 Bits Oversampling Stero A/D Converter", April 1989, ASAHI KASEI.
In the above-mentioned offset cancelling method, since an offset component detected during a period of offset value detection mode and stored in a random access memory is maintained at a fixed value even when the offset value varies with variation of circuit constants of the constitutional components of the analog-to-digital converter due to temperature variation, there may be a difference or error produced between it and an actual offset value, which error may be a source of noise by which a dynamic range of the analog-to-digital converter may be narrowed. In order to solve this problem, it may be considered to increase frequency in use of offset value detection mode. In such case, however, the period of ordinary mode of the analog-to-digital converter may be shortened correspondingly, causing total performance thereof to be degraded.